This pulse-based arithmetic unit uses a more efficient implementation for the integrate and fire analog-to-pulse converter to decrease area and power consumption of traditional digital signal processors, which are largely employed in mobile computing devices. Mobile computing is an interaction involving a portable human-computer communication device, such as a smartphone, tablet, or notebook computer. The mobile computing and portable devices market reached $830 million in 2014 and is expected to reach nearly $5.2 billion in 2020. Available devices are still using conventional digital signal processors and digital arithmetic units which limit size and energy efficiency. Researchers at the University of Florida have engineered a pulse-based arithmetic unit that utilizes timing of pulse trains to decrease both the area and power consumption of conventional digital signal processors, thus greatly optimizing the future of mobile computing.
Arithmetic pulse trains for optimized power consumption in mobile computing and portable devices
This device uses pairs of adjacent pulses, which correspond to areas under the curves of respective analog signals, in pulse trains produced by two independent integrate and fire converters (IFC). These pulse trains are then utilized to estimate the corresponding addition or multiplication sequences of the instantaneous amplitudes of the pair of analog signals passed along to the IFCs. This pulse device is comprised of a time-to-counts converter,, which is configured to convert the integrate and fire sampler pulse timing of the pulse train input into corresponding digital counts, which are then used by digital signaling processors.
