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Backside Source Field Plate Method that Uses Via Hole to Better Dissipate Heat

Modification Makes Devices Operate Safely at Higher Voltages with Better Reliability

Devices fabricated that use this backside source field plate method operate at higher voltages and with better reliability due to the lower peak electric field and junction temperature. Field-effect transistors such as AlGaN/GaN high electron mobility transistors (HEMTs) have received increasing attention for high power and high frequency applications (i.e. military radar or satellite-based communications systems) due to their superior mobility and larger energy band gap as compared to Si-based power transistors. GaN epi-layers are usually grown on sapphire, silicon (Si), or silicon carbide (SiC) substrates. Of the three, silicon substrates are the most promising as a prime candidate for mass production of GaN, but the nucleation interfacial layer between GaN and Si causes inefficient heat dissipation. University of Florida researchers have overcome this deficiency by adding a Si-substrate via hole under the active area of the HEMT to decrease the junction temperature and dissipate the heat directly through the device’s active area. The modification reshapes the electric field in the channel, reduces the peak value on the drain side of the gate edge, and reduces the gate to drain capacitance. Depending on the requirement for specific applications, the backside field plate technique is applicable to forming gate or drain field plates as well with simple modifications.

 

Application

Backside via hole technique for field effect transistors with improved heat dissipation and reliability

 

Advantages

  • Lowers peak electric field and junction temperatures, allowing fabricated devices to run at higher voltages and with better reliability
  • Redistributes the electric field, reducing the peak field on the gate edges and the high-field trapping effect
  • Easily adaptable, technique can be used to form gate or drain field plates as well

Technology

This semiconductor device and technique for a HEMT with improved heat dissipation includes a number of fabricated layers – the nucleation layer, the transition layer, a buffer, and a barrier -- built upon a substrate. Researchers etch the back side of the substrate to form a via hole through the substrate under the gate or active region of the HEMT through the layers and then fill the hole with metal. The metal-filled via hole decreases the junction temperature and dissipates the heat directly through the device’s active area.

Patent Information:
App Type: Patent No.: Patent Status:
ORD/UTIL 10,312,358 Issued